commit 3c1d218a1d3048fb576677c47eab43049d0b7778
author York Sun <york.sun@nxp.com> Mon Apr 04 11:41:26 2016 -0700
committer York Sun <york.sun@nxp.com> Wed Apr 06 10:26:46 2016 -0700
tree fac5c6482522cef5563f368ee2777f4ed274759e
parent 2a5558399828e24fce9e948288a88cd28887875e

armv8: LS2080A: Consolidate LS2080A and LS2085A

LS2080A is the primary SoC, and LS2085A is a personality with AIOP
and DPAA DDR. The RDB and QDS boards support both personality. By
detecting the SVR at runtime, a single image per board can support
both SoCs. It gives users flexibility to swtich SoC without the need
to reprogram the board.

Signed-off-by: York Sun <york.sun@nxp.com>
CC: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>

include/configs/ls2080a_common.h

diff --git a/include/configs/ls2080a_common.h b/include/configs/ls2080a_common.h
index 13ce349..57e2a29 100644
--- a/include/configs/ls2080a_common.h
+++ b/include/configs/ls2080a_common.h
@@ -171,10 +171,9 @@
 #define CONFIG_SYS_LS_MC_DRAM_DPC_OFFSET    0x00F00000
 #define CONFIG_SYS_LS_MC_DPL_MAX_LENGTH	    0x20000
 #define CONFIG_SYS_LS_MC_DRAM_DPL_OFFSET    0x00F20000
-#ifdef CONFIG_LS2085A
+/* For LS2085A */
 #define CONFIG_SYS_LS_MC_AIOP_IMG_MAX_LENGTH	0x200000
 #define CONFIG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET	0x07000000
-#endif
 
 /*
  * Carve out a DDR region which will not be used by u-boot/Linux
@@ -198,10 +197,6 @@
 #define FSL_PCIE_COMPAT "fsl,ls2080a-pcie"
 #endif
 
-#ifdef CONFIG_LS2085A
-#define FSL_PCIE_COMPAT "fsl,ls2085a-pcie"
-#endif
-
 #define CONFIG_SYS_PCI_64BIT
 
 #define CONFIG_SYS_PCIE_CFG0_PHYS_OFF	0x00000000