powerpc/p2020ds: Integrated with P2020DS DDR change and enabled hwconfig
Enabled SPD
Enabled DDR2
Enabled hwconfig
Signed-off-by: York Sun <yorksun@freescale.com>
diff --git a/board/freescale/p2020ds/p2020ds.c b/board/freescale/p2020ds/p2020ds.c
index 3fd1b34..608ff91 100644
--- a/board/freescale/p2020ds/p2020ds.c
+++ b/board/freescale/p2020ds/p2020ds.c
@@ -69,13 +69,16 @@
return 0;
}
+const char *board_hwconfig = "foo:bar=baz";
+const char *cpu_hwconfig = "foo:bar=baz";
+
phys_size_t initdram(int board_type)
{
phys_size_t dram_size = 0;
puts("Initializing....");
-#ifdef CONFIG_SPD_EEPROM
+#ifdef CONFIG_DDR_SPD
dram_size = fsl_ddr_sdram();
#else
dram_size = fixed_sdram();
@@ -94,7 +97,7 @@
return dram_size;
}
-#if !defined(CONFIG_SPD_EEPROM)
+#if !defined(CONFIG_DDR_SPD)
/*
* Fixed sdram init -- doesn't use serial presence detect.
*/