powerpc/t208x: some update to support t2081

- fix serdes definition for t2081.
- fix clock speed for t2081.
- update ids, as CONFIG_FSL_SATA_V2 is needed only for t2080,
  T2081 has no SATA.

Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
diff --git a/arch/powerpc/cpu/mpc85xx/speed.c b/arch/powerpc/cpu/mpc85xx/speed.c
index 35867df..adf09ef 100644
--- a/arch/powerpc/cpu/mpc85xx/speed.c
+++ b/arch/powerpc/cpu/mpc85xx/speed.c
@@ -151,7 +151,8 @@
 		sys_info->freq_processor[cpu] =
 			 freq_c_pll[cplx_pll] / core_cplx_pll_div[c_pll_sel];
 	}
-#if defined(CONFIG_PPC_B4860) || defined(CONFIG_PPC_T2080)
+#if defined(CONFIG_PPC_B4860) || defined(CONFIG_PPC_T2080) || \
+	defined(CONFIG_PPC_T2081)
 #define FM1_CLK_SEL	0xe0000000
 #define FM1_CLK_SHIFT	29
 #else
diff --git a/arch/powerpc/cpu/mpc85xx/t2080_ids.c b/arch/powerpc/cpu/mpc85xx/t2080_ids.c
index 068e1f2..0bfd447 100644
--- a/arch/powerpc/cpu/mpc85xx/t2080_ids.c
+++ b/arch/powerpc/cpu/mpc85xx/t2080_ids.c
@@ -53,8 +53,10 @@
 	SET_USB_LIODN(1, "fsl-usb2-mph", 553),
 	SET_USB_LIODN(2, "fsl-usb2-dr", 554),
 
+#ifdef CONFIG_FSL_SATA_V2
 	SET_SATA_LIODN(1, 555),
 	SET_SATA_LIODN(2, 556),
+#endif
 
 	SET_PCI_LIODN_BASE(CONFIG_SYS_FSL_PCIE_COMPAT, 1, 148),
 	SET_PCI_LIODN_BASE(CONFIG_SYS_FSL_PCIE_COMPAT, 2, 228),
diff --git a/arch/powerpc/cpu/mpc85xx/t2080_serdes.c b/arch/powerpc/cpu/mpc85xx/t2080_serdes.c
index f2fbdeb..07e27de 100644
--- a/arch/powerpc/cpu/mpc85xx/t2080_serdes.c
+++ b/arch/powerpc/cpu/mpc85xx/t2080_serdes.c
@@ -43,7 +43,6 @@
 	{0x6C, {XFI_FM1_MAC9, XFI_FM1_MAC10,
 		SGMII_FM1_DTSEC1, SGMII_FM1_DTSEC2,
 		PCIE4, PCIE4, PCIE4, PCIE4} },
-#if defined(CONFIG_PPC_T2080)
 	{0x1C, {SGMII_FM1_DTSEC9, SGMII_FM1_DTSEC10,
 		SGMII_FM1_DTSEC1, SGMII_FM1_DTSEC2,
 		SGMII_FM1_DTSEC3, SGMII_FM1_DTSEC4,
@@ -129,7 +128,7 @@
 		XFI_FM1_MAC1, XFI_FM1_MAC2,
 		PCIE4, PCIE4, PCIE4, PCIE4} },
 
-#elif defined(CONFIG_PPC_T2081)
+#if defined(CONFIG_PPC_T2081)
 	{0xAA, {PCIE3, PCIE3, PCIE3, PCIE3,
 		PCIE4, PCIE4, PCIE4, PCIE4} },
 	{0xCA, {PCIE3, SGMII_FM1_DTSEC10, SGMII_FM1_DTSEC1,