Finish conversion of CONFIG_SYS_CLK_FREQ to Kconfig
In order to finish moving this symbol to Kconfig for all platforms, we
need to do a few more things. First, for all platforms that define this
to a function, introduce CONFIG_DYNAMIC_SYS_CLK_FREQ, similar to
CONFIG_DYNAMIC_DDR_CLK_FREQ and populate clock_legacy.h. This entails
also switching all users from CONFIG_SYS_CLK_FREQ to get_board_sys_clk()
and updating a few preprocessor tests.
With that done, all platforms that define a value here can be converted
to Kconfig, and a fall-back of zero is sufficiently safe to use (and
what is used today in cases where code may or may not have this
available). Make sure that code which calls this function includes
<clock_legacy.h> to get the prototype.
Signed-off-by: Tom Rini <trini@konsulko.com>
diff --git a/board/cadence/xtfpga/xtfpga.c b/board/cadence/xtfpga/xtfpga.c
index d30940d..ade7f9d 100644
--- a/board/cadence/xtfpga/xtfpga.c
+++ b/board/cadence/xtfpga/xtfpga.c
@@ -5,6 +5,7 @@
*/
#include <common.h>
+#include <clock_legacy.h>
#include <command.h>
#include <dm.h>
#include <init.h>
diff --git a/board/freescale/common/cadmus.c b/board/freescale/common/cadmus.c
index b14abac..8f3fb5f 100644
--- a/board/freescale/common/cadmus.c
+++ b/board/freescale/common/cadmus.c
@@ -5,7 +5,7 @@
#include <common.h>
-
+#include <clock_legacy.h>
/*
* CADMUS Board System Registers
diff --git a/board/freescale/common/ics307_clk.c b/board/freescale/common/ics307_clk.c
index 03be8be..01662d3 100644
--- a/board/freescale/common/ics307_clk.c
+++ b/board/freescale/common/ics307_clk.c
@@ -4,6 +4,7 @@
*/
#include <common.h>
+#include <clock_legacy.h>
#include <log.h>
#include <asm/io.h>
diff --git a/board/freescale/ls1043aqds/ls1043aqds.c b/board/freescale/ls1043aqds/ls1043aqds.c
index 2d53224..13359f9 100644
--- a/board/freescale/ls1043aqds/ls1043aqds.c
+++ b/board/freescale/ls1043aqds/ls1043aqds.c
@@ -5,6 +5,7 @@
*/
#include <common.h>
+#include <clock_legacy.h>
#include <i2c.h>
#include <fdt_support.h>
#include <fsl_ddr_sdram.h>
diff --git a/board/freescale/ls1046aqds/ls1046aqds.c b/board/freescale/ls1046aqds/ls1046aqds.c
index cc95d44..8481c45 100644
--- a/board/freescale/ls1046aqds/ls1046aqds.c
+++ b/board/freescale/ls1046aqds/ls1046aqds.c
@@ -5,6 +5,7 @@
*/
#include <common.h>
+#include <clock_legacy.h>
#include <i2c.h>
#include <fdt_support.h>
#include <fsl_ddr_sdram.h>
diff --git a/board/freescale/ls1088a/ls1088a.c b/board/freescale/ls1088a/ls1088a.c
index 8a112a6..aa548b2 100644
--- a/board/freescale/ls1088a/ls1088a.c
+++ b/board/freescale/ls1088a/ls1088a.c
@@ -3,6 +3,7 @@
* Copyright 2017-2018 NXP
*/
#include <common.h>
+#include <clock_legacy.h>
#include <env.h>
#include <i2c.h>
#include <init.h>
diff --git a/board/freescale/ls2080aqds/ls2080aqds.c b/board/freescale/ls2080aqds/ls2080aqds.c
index 2f0139e..297629d 100644
--- a/board/freescale/ls2080aqds/ls2080aqds.c
+++ b/board/freescale/ls2080aqds/ls2080aqds.c
@@ -3,6 +3,7 @@
* Copyright 2015 Freescale Semiconductor
*/
#include <common.h>
+#include <clock_legacy.h>
#include <env.h>
#include <init.h>
#include <malloc.h>
diff --git a/board/freescale/ls2080ardb/ls2080ardb.c b/board/freescale/ls2080ardb/ls2080ardb.c
index bf660a8..1975b0f 100644
--- a/board/freescale/ls2080ardb/ls2080ardb.c
+++ b/board/freescale/ls2080ardb/ls2080ardb.c
@@ -4,6 +4,7 @@
* Copyright 2017 NXP
*/
#include <common.h>
+#include <clock_legacy.h>
#include <env.h>
#include <init.h>
#include <malloc.h>
diff --git a/board/freescale/p1010rdb/spl.c b/board/freescale/p1010rdb/spl.c
index 6c84eef..7eaa204 100644
--- a/board/freescale/p1010rdb/spl.c
+++ b/board/freescale/p1010rdb/spl.c
@@ -43,7 +43,7 @@
/* initialize selected port with appropriate baud rate */
plat_ratio = in_be32(&gur->porpllsr) & MPC85xx_PORPLLSR_PLAT_RATIO;
plat_ratio >>= 1;
- gd->bus_clk = CONFIG_SYS_CLK_FREQ * plat_ratio;
+ gd->bus_clk = get_board_sys_clk() * plat_ratio;
ns16550_init((struct ns16550 *)CONFIG_SYS_NS16550_COM1,
gd->bus_clk / 16 / CONFIG_BAUDRATE);
diff --git a/board/freescale/p1010rdb/spl_minimal.c b/board/freescale/p1010rdb/spl_minimal.c
index 989c5b1..a956c5a 100644
--- a/board/freescale/p1010rdb/spl_minimal.c
+++ b/board/freescale/p1010rdb/spl_minimal.c
@@ -3,6 +3,7 @@
* Copyright 2011 Freescale Semiconductor, Inc.
*/
#include <common.h>
+#include <clock_legacy.h>
#include <init.h>
#include <mpc85xx.h>
#include <asm/io.h>
@@ -29,7 +30,7 @@
/* initialize selected port with appropriate baud rate */
plat_ratio = in_be32(&gur->porpllsr) & MPC85xx_PORPLLSR_PLAT_RATIO;
plat_ratio >>= 1;
- gd->bus_clk = CONFIG_SYS_CLK_FREQ * plat_ratio;
+ gd->bus_clk = get_board_sys_clk() * plat_ratio;
ns16550_init((struct ns16550 *)CONFIG_SYS_NS16550_COM1,
gd->bus_clk / 16 / CONFIG_BAUDRATE);
diff --git a/board/freescale/p1_p2_rdb_pc/spl.c b/board/freescale/p1_p2_rdb_pc/spl.c
index 1184684..f855f3a 100644
--- a/board/freescale/p1_p2_rdb_pc/spl.c
+++ b/board/freescale/p1_p2_rdb_pc/spl.c
@@ -48,7 +48,7 @@
/* initialize selected port with appropriate baud rate */
plat_ratio = in_be32(&gur->porpllsr) & MPC85xx_PORPLLSR_PLAT_RATIO;
plat_ratio >>= 1;
- bus_clk = CONFIG_SYS_CLK_FREQ * plat_ratio;
+ bus_clk = get_board_sys_clk() * plat_ratio;
gd->bus_clk = bus_clk;
ns16550_init((struct ns16550 *)CONFIG_SYS_NS16550_COM1,
diff --git a/board/freescale/p1_p2_rdb_pc/spl_minimal.c b/board/freescale/p1_p2_rdb_pc/spl_minimal.c
index eb3f2c8..72beead 100644
--- a/board/freescale/p1_p2_rdb_pc/spl_minimal.c
+++ b/board/freescale/p1_p2_rdb_pc/spl_minimal.c
@@ -4,6 +4,7 @@
*/
#include <common.h>
+#include <clock_legacy.h>
#include <init.h>
#include <ns16550.h>
#include <asm/io.h>
@@ -28,7 +29,7 @@
/* initialize selected port with appropriate baud rate */
plat_ratio = in_be32(&gur->porpllsr) & MPC85xx_PORPLLSR_PLAT_RATIO;
plat_ratio >>= 1;
- gd->bus_clk = CONFIG_SYS_CLK_FREQ * plat_ratio;
+ gd->bus_clk = get_board_sys_clk() * plat_ratio;
ns16550_init((struct ns16550 *)CONFIG_SYS_NS16550_COM1,
gd->bus_clk / 16 / CONFIG_BAUDRATE);
diff --git a/board/freescale/p2041rdb/p2041rdb.c b/board/freescale/p2041rdb/p2041rdb.c
index 894fe8e..5bd2b99 100644
--- a/board/freescale/p2041rdb/p2041rdb.c
+++ b/board/freescale/p2041rdb/p2041rdb.c
@@ -4,6 +4,7 @@
*/
#include <common.h>
+#include <clock_legacy.h>
#include <command.h>
#include <env.h>
#include <fdt_support.h>
diff --git a/board/freescale/t102xrdb/spl.c b/board/freescale/t102xrdb/spl.c
index 7f59172..af15da5 100644
--- a/board/freescale/t102xrdb/spl.c
+++ b/board/freescale/t102xrdb/spl.c
@@ -69,7 +69,7 @@
#endif
/* initialize selected port with appropriate baud rate */
- sys_clk = CONFIG_SYS_CLK_FREQ;
+ sys_clk = get_board_sys_clk();
plat_ratio = (in_be32(&gur->rcwsr[0]) >> 25) & 0x1f;
ccb_clk = sys_clk * plat_ratio / 2;
diff --git a/board/freescale/t104xrdb/spl.c b/board/freescale/t104xrdb/spl.c
index 6acc516..dfaff1a 100644
--- a/board/freescale/t104xrdb/spl.c
+++ b/board/freescale/t104xrdb/spl.c
@@ -68,7 +68,7 @@
console_init_f();
/* initialize selected port with appropriate baud rate */
- sys_clk = CONFIG_SYS_CLK_FREQ;
+ sys_clk = get_board_sys_clk();
plat_ratio = (in_be32(&gur->rcwsr[0]) >> 25) & 0x1f;
uart_clk = sys_clk * plat_ratio / 2;
diff --git a/board/freescale/t208xqds/t208xqds.c b/board/freescale/t208xqds/t208xqds.c
index e54672a..1da3a71 100644
--- a/board/freescale/t208xqds/t208xqds.c
+++ b/board/freescale/t208xqds/t208xqds.c
@@ -5,6 +5,7 @@
*/
#include <common.h>
+#include <clock_legacy.h>
#include <command.h>
#include <env.h>
#include <fdt_support.h>
diff --git a/board/freescale/t208xrdb/spl.c b/board/freescale/t208xrdb/spl.c
index 40aa0c5..60fe084 100644
--- a/board/freescale/t208xrdb/spl.c
+++ b/board/freescale/t208xrdb/spl.c
@@ -38,7 +38,7 @@
console_init_f();
/* initialize selected port with appropriate baud rate */
- sys_clk = CONFIG_SYS_CLK_FREQ;
+ sys_clk = get_board_sys_clk();
plat_ratio = (in_be32(&gur->rcwsr[0]) >> 25) & 0x1f;
ccb_clk = sys_clk * plat_ratio / 2;
diff --git a/board/freescale/t4rdb/spl.c b/board/freescale/t4rdb/spl.c
index 8c7421d..c7d5de3 100644
--- a/board/freescale/t4rdb/spl.c
+++ b/board/freescale/t4rdb/spl.c
@@ -47,7 +47,7 @@
console_init_f();
/* initialize selected port with appropriate baud rate */
- sys_clk = CONFIG_SYS_CLK_FREQ;
+ sys_clk = get_board_sys_clk();
plat_ratio = (in_be32(&gur->rcwsr[0]) >> 25) & 0x1f;
ccb_clk = sys_clk * plat_ratio / 2;
diff --git a/board/renesas/eagle/eagle.c b/board/renesas/eagle/eagle.c
index 3417b50..9af935c 100644
--- a/board/renesas/eagle/eagle.c
+++ b/board/renesas/eagle/eagle.c
@@ -7,6 +7,7 @@
*/
#include <common.h>
+#include <clock_legacy.h>
#include <cpu_func.h>
#include <hang.h>
#include <init.h>
@@ -50,7 +51,7 @@
writel(0xA5A5A500, &swdt->swtcsra);
/* CPU frequency setting. Set to 0.8GHz */
- stc = ((800 / CLK2MHZ(CONFIG_SYS_CLK_FREQ)) - 1) << PLL0_STC_OFFSET;
+ stc = ((800 / CLK2MHZ(get_board_sys_clk())) - 1) << PLL0_STC_OFFSET;
clrsetbits_le32(PLL0CR, PLL0_STC_MASK, stc);
}
diff --git a/board/renesas/gose/gose.c b/board/renesas/gose/gose.c
index 51768c3..6197e54 100644
--- a/board/renesas/gose/gose.c
+++ b/board/renesas/gose/gose.c
@@ -6,6 +6,7 @@
*/
#include <common.h>
+#include <clock_legacy.h>
#include <cpu_func.h>
#include <env.h>
#include <hang.h>
@@ -45,7 +46,7 @@
writel(0xA5A5A500, &swdt->swtcsra);
/* CPU frequency setting. Set to 1.5GHz */
- stc = ((1500 / CLK2MHZ(CONFIG_SYS_CLK_FREQ)) - 1) << PLL0_STC_BIT;
+ stc = ((1500 / CLK2MHZ(get_board_sys_clk())) - 1) << PLL0_STC_BIT;
clrsetbits_le32(PLL0CR, PLL0_STC_MASK, stc);
/* QoS */
diff --git a/board/renesas/koelsch/koelsch.c b/board/renesas/koelsch/koelsch.c
index 7e94bd8..87607df 100644
--- a/board/renesas/koelsch/koelsch.c
+++ b/board/renesas/koelsch/koelsch.c
@@ -7,6 +7,7 @@
*/
#include <common.h>
+#include <clock_legacy.h>
#include <cpu_func.h>
#include <env.h>
#include <hang.h>
@@ -47,7 +48,7 @@
writel(0xA5A5A500, &swdt->swtcsra);
/* CPU frequency setting. Set to 1.5GHz */
- stc = ((1500 / CLK2MHZ(CONFIG_SYS_CLK_FREQ)) - 1) << PLL0_STC_BIT;
+ stc = ((1500 / CLK2MHZ(get_board_sys_clk())) - 1) << PLL0_STC_BIT;
clrsetbits_le32(PLL0CR, PLL0_STC_MASK, stc);
/* QoS */
diff --git a/board/renesas/lager/lager.c b/board/renesas/lager/lager.c
index 87c5e01..8e24ac0 100644
--- a/board/renesas/lager/lager.c
+++ b/board/renesas/lager/lager.c
@@ -8,6 +8,7 @@
*/
#include <common.h>
+#include <clock_legacy.h>
#include <cpu_func.h>
#include <env.h>
#include <env_internal.h>
@@ -50,7 +51,7 @@
/* CPU frequency setting. Set to 1.4GHz */
if (rmobile_get_cpu_rev_integer() >= R8A7790_CUT_ES2X) {
u32 stat = 0;
- u32 stc = ((1400 / CLK2MHZ(CONFIG_SYS_CLK_FREQ)) - 1)
+ u32 stc = ((1400 / CLK2MHZ(get_board_sys_clk())) - 1)
<< PLL0_STC_BIT;
clrsetbits_le32(PLL0CR, PLL0_STC_MASK, stc);
diff --git a/board/renesas/porter/porter.c b/board/renesas/porter/porter.c
index b0f8505..1a3a4c1 100644
--- a/board/renesas/porter/porter.c
+++ b/board/renesas/porter/porter.c
@@ -7,6 +7,7 @@
*/
#include <common.h>
+#include <clock_legacy.h>
#include <cpu_func.h>
#include <env.h>
#include <hang.h>
@@ -47,7 +48,7 @@
writel(0xA5A5A500, &swdt->swtcsra);
/* CPU frequency setting. Set to 1.5GHz */
- stc = ((1500 / CLK2MHZ(CONFIG_SYS_CLK_FREQ)) - 1) << PLL0_STC_BIT;
+ stc = ((1500 / CLK2MHZ(get_board_sys_clk())) - 1) << PLL0_STC_BIT;
clrsetbits_le32(PLL0CR, PLL0_STC_MASK, stc);
/* QoS */
diff --git a/board/renesas/stout/stout.c b/board/renesas/stout/stout.c
index 3fdf936..56bdb34 100644
--- a/board/renesas/stout/stout.c
+++ b/board/renesas/stout/stout.c
@@ -9,6 +9,7 @@
*/
#include <common.h>
+#include <clock_legacy.h>
#include <env.h>
#include <init.h>
#include <malloc.h>
@@ -50,7 +51,7 @@
/* CPU frequency setting. Set to 1.4GHz */
if (rmobile_get_cpu_rev_integer() >= R8A7790_CUT_ES2X) {
u32 stat = 0;
- u32 stc = ((1400 / CLK2MHZ(CONFIG_SYS_CLK_FREQ)) - 1)
+ u32 stc = ((1400 / CLK2MHZ(get_board_sys_clk())) - 1)
<< PLL0_STC_BIT;
clrsetbits_le32(PLL0CR, PLL0_STC_MASK, stc);
diff --git a/board/socrates/socrates.c b/board/socrates/socrates.c
index a81cb7b..f6a3cc1 100644
--- a/board/socrates/socrates.c
+++ b/board/socrates/socrates.c
@@ -57,7 +57,7 @@
/* Check the PCI_clk sel bit */
if (in_be32(&gur->porpllsr) & (1<<15)) {
src = "SYSCLK";
- f = CONFIG_SYS_CLK_FREQ;
+ f = get_board_sys_clk();
} else {
src = "PCI_CLK";
f = CONFIG_PCI_CLK_FREQ;
diff --git a/board/sunxi/board.c b/board/sunxi/board.c
index fdbcd40..2790a0f 100644
--- a/board/sunxi/board.c
+++ b/board/sunxi/board.c
@@ -11,6 +11,7 @@
*/
#include <common.h>
+#include <clock_legacy.h>
#include <dm.h>
#include <env.h>
#include <hang.h>
@@ -667,7 +668,7 @@
* assured it's being powered with suitable core voltage
*/
if (!power_failed)
- clock_set_pll1(CONFIG_SYS_CLK_FREQ);
+ clock_set_pll1(get_board_sys_clk());
else
printf("Failed to set core voltage! Can't set CPU frequency\n");
}
diff --git a/board/xes/common/fsl_8xxx_clk.c b/board/xes/common/fsl_8xxx_clk.c
index 8c72c15..20e88d4 100644
--- a/board/xes/common/fsl_8xxx_clk.c
+++ b/board/xes/common/fsl_8xxx_clk.c
@@ -4,6 +4,7 @@
*/
#include <common.h>
+#include <clock_legacy.h>
#include <asm/io.h>
/*