PCI: zynqmp: Add ZynqMP NWL PCIe root port driver
This patch adds the PCIe controller driver for the Xilinx / AMD ZynqMP
NWL PCIe Bridge as root port. The driver source is partly copied from
the Linux PCI driver and modified to enable usage in U-Boot (e.g.
simplified and interrupt support removed).
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Pali Rohár <pali@kernel.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Michal Simek <michal.simek@amd.com>
Tested-by: Michal Simek <michal.simek@amd.com>
Acked-by: Michal Simek <michal.simek@amd.com>
Reviewed-by: Pali Rohár <pali@kernel.org>
Link: https://lore.kernel.org/r/20230525094918.111949-1-sr@denx.de
Signed-off-by: Michal Simek <michal.simek@amd.com>
diff --git a/MAINTAINERS b/MAINTAINERS
index 23659e7..d724b64 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -343,6 +343,7 @@
F: drivers/spi/kirkwood_spi.c
F: drivers/spi/mvebu_a3700_spi.c
F: drivers/pci/pcie_dw_mvebu.c
+F: drivers/pci/pcie-xilinx-nwl.c
F: drivers/watchdog/armada-37xx-wdt.c
F: drivers/watchdog/orion_wdt.c
F: include/configs/mv-common.h