Timer: Remove reset_timer_masked()
In some circumstances, reset_timer_masked() was called be timer_init() in
order to perform architecture specific timer initialisation. In such
cases, the required code in reset_timer_masked() has been moved into
timer_init()
diff --git a/arch/arm/cpu/arm920t/at91/timer.c b/arch/arm/cpu/arm920t/at91/timer.c
index 374cc25..c321e28 100644
--- a/arch/arm/cpu/arm920t/at91/timer.c
+++ b/arch/arm/cpu/arm920t/at91/timer.c
@@ -82,14 +82,6 @@
udelay_masked(usec);
}
-void reset_timer_masked(void)
-{
- /* reset time */
- at91_tc_t *tc = (at91_tc_t *) ATMEL_BASE_TC;
- gd->lastinc = readl(&tc->tc[0].cv) & 0x0000ffff;
- gd->tbl = 0;
-}
-
ulong get_timer_raw(void)
{
at91_tc_t *tc = (at91_tc_t *) ATMEL_BASE_TC;
diff --git a/arch/arm/cpu/arm920t/at91rm9200/timer.c b/arch/arm/cpu/arm920t/at91rm9200/timer.c
index 9a1ae85..fbe74b6 100644
--- a/arch/arm/cpu/arm920t/at91rm9200/timer.c
+++ b/arch/arm/cpu/arm920t/at91rm9200/timer.c
@@ -81,13 +81,6 @@
udelay_masked(usec);
}
-void reset_timer_masked (void)
-{
- /* reset time */
- lastinc = READ_TIMER;
- timestamp = 0;
-}
-
ulong get_timer_raw (void)
{
ulong now = READ_TIMER;
diff --git a/arch/arm/cpu/arm920t/ep93xx/timer.c b/arch/arm/cpu/arm920t/ep93xx/timer.c
index f19ec61..a3990a7 100644
--- a/arch/arm/cpu/arm920t/ep93xx/timer.c
+++ b/arch/arm/cpu/arm920t/ep93xx/timer.c
@@ -91,12 +91,6 @@
return get_timer_masked() - base;
}
-void reset_timer_masked(void)
-{
- read_timer();
- timer.ticks = 0;
-}
-
void __udelay(unsigned long usec)
{
unsigned long long target;
@@ -123,7 +117,9 @@
writel(TIMER_ENABLE | TIMER_CLKSEL,
&timer_regs->timer3.control);
- reset_timer_masked();
+ /* Reset the timer */
+ read_timer();
+ timer.ticks = 0;
return 0;
}
diff --git a/arch/arm/cpu/arm920t/imx/timer.c b/arch/arm/cpu/arm920t/imx/timer.c
index cdb2148..6141bd4 100644
--- a/arch/arm/cpu/arm920t/imx/timer.c
+++ b/arch/arm/cpu/arm920t/imx/timer.c
@@ -43,7 +43,9 @@
TPRER1 = get_PERCLK1() / 1000000; /* 1 MHz */
TCTL1 |= TCTL_FRR | (1<<1); /* Freerun Mode, PERCLK1 input */
- reset_timer_masked();
+ /* Reset the timer */
+ TCTL1 &= ~TCTL_TEN;
+ TCTL1 |= TCTL_TEN; /* Enable timer */
return (0);
}
@@ -56,12 +58,6 @@
return get_timer_masked() - base;
}
-void reset_timer_masked (void)
-{
- TCTL1 &= ~TCTL_TEN;
- TCTL1 |= TCTL_TEN; /* Enable timer */
-}
-
ulong get_timer_masked (void)
{
return TCN1;
diff --git a/arch/arm/cpu/arm920t/ks8695/timer.c b/arch/arm/cpu/arm920t/ks8695/timer.c
index c78fd90..234fe91 100644
--- a/arch/arm/cpu/arm920t/ks8695/timer.c
+++ b/arch/arm/cpu/arm920t/ks8695/timer.c
@@ -33,7 +33,11 @@
int timer_init (void)
{
- reset_timer_masked();
+ /* Set the hadware timer for 1ms */
+ ks8695_write(KS8695_TIMER1, TIMER_COUNT);
+ ks8695_write(KS8695_TIMER1_PCOUNT, TIMER_PULSE);
+ ks8695_write(KS8695_TIMER_CTRL, 0x2);
+ timer_ticks = 0;
return 0;
}
@@ -46,15 +50,6 @@
#define TIMER_COUNT (TIMER_INTERVAL / 2)
#define TIMER_PULSE TIMER_COUNT
-void reset_timer_masked(void)
-{
- /* Set the hadware timer for 1ms */
- ks8695_write(KS8695_TIMER1, TIMER_COUNT);
- ks8695_write(KS8695_TIMER1_PCOUNT, TIMER_PULSE);
- ks8695_write(KS8695_TIMER_CTRL, 0x2);
- timer_ticks = 0;
-}
-
ulong get_timer_masked(void)
{
/* Check for timer wrap */
diff --git a/arch/arm/cpu/arm920t/s3c24x0/timer.c b/arch/arm/cpu/arm920t/s3c24x0/timer.c
index 9c71b80..9571870 100644
--- a/arch/arm/cpu/arm920t/s3c24x0/timer.c
+++ b/arch/arm/cpu/arm920t/s3c24x0/timer.c
@@ -101,13 +101,6 @@
/*NOP*/;
}
-void reset_timer_masked(void)
-{
- /* reset time */
- lastdec = READ_TIMER();
- timestamp = 0;
-}
-
ulong get_timer_masked(void)
{
ulong tmr = get_ticks();