Consolidate ADS5121 IO Pin configuration

Consolidate ADS5121 IO Pin configuration to one file
board/ads5121/iopin.c.

Remove pin config from cpu/mpc512x/fec.c

Signed-off-by: Martha Marx <mmarx@silicontkx.com>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Acked-by: John Rigby <jrigby@freescale.com>
diff --git a/board/ads5121/ads5121.c b/board/ads5121/ads5121.c
index ef66663..130b81d 100644
--- a/board/ads5121/ads5121.c
+++ b/board/ads5121/ads5121.c
@@ -45,28 +45,12 @@
 #define CSAW_START(start)	((start) & 0xFFFF0000)
 #define CSAW_STOP(start, size)	(((start) + (size) - 1) >> 16)
 
-#define MPC5121_IOCTL_PSC6_0	(0x284/4)
-#define MPC5121_IO_DIU_START	(0x288/4)
-#define MPC5121_IO_DIU_END	(0x2fc/4)
-
-/* Functional pin muxing */
-#define MPC5121_IO_FUNC1	(0 << 7)
-#define MPC5121_IO_FUNC2	(1 << 7)
-#define MPC5121_IO_FUNC3	(2 << 7)
-#define MPC5121_IO_FUNC4	(3 << 7)
-#define MPC5121_IO_ST		(1 << 2)
-#define MPC5121_IO_DS_1		(0)
-#define MPC5121_IO_DS_2		(1)
-#define MPC5121_IO_DS_3		(2)
-#define MPC5121_IO_DS_4		(3)
-
 long int fixed_sdram(void);
 
 int board_early_init_f (void)
 {
 	volatile immap_t *im = (immap_t *) CFG_IMMR;
 	u32 lpcaw, tmp32;
-	volatile ioctrl512x_t *ioctl = &(im->io_ctrl);
 	int i;
 
 	/*
@@ -99,16 +83,6 @@
 	im->clk.sccr[0] = SCCR1_CLOCKS_EN;
 	im->clk.sccr[1] = SCCR2_CLOCKS_EN;
 
-	/* Configure DIU clock pin */
-	tmp32 = ioctl->regs[MPC5121_IOCTL_PSC6_0];
-	tmp32 &= ~0x1ff;
-	tmp32 |= MPC5121_IO_FUNC3 | MPC5121_IO_DS_4;
-	ioctl->regs[MPC5121_IOCTL_PSC6_0] = tmp32;
-
-	/* Initialize IO pins (pin mux) for DIU function */
-	for (i = MPC5121_IO_DIU_START; i < MPC5121_IO_DIU_END; i++)
-		ioctl->regs[i] |= (MPC5121_IO_FUNC3 | MPC5121_IO_DS_4);
-
 	return 0;
 }
 
@@ -250,17 +224,12 @@
 {
 	ushort brd_rev = *(vu_short *) (CFG_CPLD_BASE + 0x00);
 	uchar cpld_rev = *(vu_char *) (CFG_CPLD_BASE + 0x02);
-	volatile immap_t *im = (immap_t *) CFG_IMMR;
-	volatile unsigned long *reg;
-	int i;
 
 	printf ("Board: ADS5121 rev. 0x%04x (CPLD rev. 0x%02x)\n",
 		brd_rev, cpld_rev);
+	/* initialize function mux & slew rate IO inter alia on IO Pins  */
+	iopin_initialize();
 
-	/* change the slew rate on all pata pins to max */
-	reg = (unsigned long *) &(im->io_ctrl.regs[PATA_CE1_IDX]);
-	for (i = 0; i < 9; i++)
-		reg[i] |= 0x00000003;
 	return 0;
 }