Cache update and added CFG_UNIFY_CACHE
Enabled cache in cpu_init_f() for faster flash to mem allocation. Updated cache handling in start.S. Applied cache invalidate in fec_send() and fec_recv(). Added CFG_UNIFY_CACHE for CF V3 only.
Signed-off-by: TsiChung <tcliew@Goku.(none)>
diff --git a/cpu/mcf532x/cpu_init.c b/cpu/mcf532x/cpu_init.c
index b056fbe..32711a1 100644
--- a/cpu/mcf532x/cpu_init.c
+++ b/cpu/mcf532x/cpu_init.c
@@ -113,6 +113,8 @@
fbcs->cscr5 = CFG_CS5_CTRL;
fbcs->csmr5 = CFG_CS5_MASK;
#endif
+
+ icache_enable();
}
/*
@@ -120,6 +122,5 @@
*/
int cpu_init_r(void)
{
- icache_enable();
return (0);
}
diff --git a/cpu/mcf532x/start.S b/cpu/mcf532x/start.S
index acd3494..ac44aaa 100644
--- a/cpu/mcf532x/start.S
+++ b/cpu/mcf532x/start.S
@@ -270,8 +270,6 @@
movec %d0, %CACR /* Invalidate cache */
move.l #(CFG_SDRAM_BASE + 0xc000), %d0 /* Setup cache mask */
movec %d0, %ACR0 /* Enable cache */
- move.l #(CFG_CS0_BASE + 0x0000), %d0 /* Setup cache mask */
- movec %d0, %ACR1 /* Enable cache */
move.l #0x80000200, %d0 /* Setup cache mask */
movec %d0, %CACR /* Enable cache */
@@ -284,11 +282,11 @@
.globl icache_disable
icache_disable:
- move.l #0x00000100, %d0 /* Setup cache mask */
- movec %d0, %CACR /* Enable cache */
+ move.l #0x01000000, %d0 /* Setup cache mask */
+ movec %d0, %CACR /* Disable cache */
clr.l %d0 /* Setup cache mask */
- movec %d0, %ACR0 /* Enable cache */
- movec %d0, %ACR1 /* Enable cache */
+ movec %d0, %ACR0
+ movec %d0, %ACR1
move.l #(CFG_INIT_RAM_ADDR+CFG_INIT_RAM_END-8), %a1
moveq #0, %d0
@@ -303,7 +301,7 @@
.globl icache_invalid
icache_invalid:
- move.l #0x01000000, %d0 /* Setup cache mask */
+ move.l #0x81000200, %d0 /* Setup cache mask */
movec %d0, %CACR /* Enable cache */
rts
diff --git a/drivers/net/mcffec.c b/drivers/net/mcffec.c
index 609210d..11f6721 100644
--- a/drivers/net/mcffec.c
+++ b/drivers/net/mcffec.c
@@ -150,23 +150,15 @@
* Wait for ready
*/
j = 0;
-#if (CONFIG_COMMANDS & CFG_CMD_CACHE)
- icache_invalid();
-#endif
while ((info->txbd[info->txIdx].cbd_sc & BD_ENET_TX_READY) &&
(j < MCFFEC_TOUT_LOOP)) {
udelay(1);
j++;
-#if (CONFIG_COMMANDS & CFG_CMD_CACHE)
- icache_invalid();
-#endif
}
if (j >= MCFFEC_TOUT_LOOP) {
printf("TX not ready\n");
}
-#if (CONFIG_COMMANDS & CFG_CMD_CACHE)
- icache_invalid();
-#endif
+
info->txbd[info->txIdx].cbd_bufaddr = (uint) packet;
info->txbd[info->txIdx].cbd_datlen = length;
info->txbd[info->txIdx].cbd_sc |= BD_ENET_TX_RDY_LST;
@@ -174,21 +166,19 @@
/* Activate transmit Buffer Descriptor polling */
fecp->tdar = 0x01000000; /* Descriptor polling active */
- j = 0;
-#if (CONFIG_COMMANDS & CFG_CMD_CACHE)
+#ifdef CFG_UNIFY_CACHE
icache_invalid();
#endif
+ j = 0;
while ((info->txbd[info->txIdx].cbd_sc & BD_ENET_TX_READY) &&
(j < MCFFEC_TOUT_LOOP)) {
udelay(1);
j++;
-#if (CONFIG_COMMANDS & CFG_CMD_CACHE)
- icache_invalid();
-#endif
}
if (j >= MCFFEC_TOUT_LOOP) {
printf("TX timeout\n");
}
+
#ifdef ET_DEBUG
printf("%s[%d] %s: cycles: %d status: %x retry cnt: %d\n",
__FILE__, __LINE__, __FUNCTION__, j,
@@ -196,10 +186,7 @@
(info->txbd[info->txIdx].cbd_sc & 0x003C) >> 2);
#endif
- /* return only status bits */ ;
-#if (CONFIG_COMMANDS & CFG_CMD_CACHE)
- icache_invalid();
-#endif
+ /* return only status bits */
rc = (info->txbd[info->txIdx].cbd_sc & BD_ENET_TX_STATS);
info->txIdx = (info->txIdx + 1) % TX_BUF_CNT;
@@ -213,6 +200,9 @@
int length;
for (;;) {
+#ifdef CFG_UNIFY_CACHE
+ icache_invalid();
+#endif
/* section 16.9.23.2 */
if (info->rxbd[info->rxIdx].cbd_sc & BD_ENET_RX_EMPTY) {
length = -1;
diff --git a/include/configs/M5329EVB.h b/include/configs/M5329EVB.h
index c90773c..d1ac340 100644
--- a/include/configs/M5329EVB.h
+++ b/include/configs/M5329EVB.h
@@ -47,18 +47,20 @@
#define CONFIG_WATCHDOG_TIMEOUT 5000 /* timeout in milliseconds, max timeout is 6.71sec */
#define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \
- CFG_CMD_CACHE | \
- CFG_CMD_DATE | \
- CFG_CMD_ELF | \
- CFG_CMD_FLASH | \
- (CFG_CMD_LOADB | CFG_CMD_LOADS) | \
- CFG_CMD_MEMORY | \
- CFG_CMD_MISC | \
- CFG_CMD_MII | \
- CFG_CMD_NET | \
- CFG_CMD_PING | \
- CFG_CMD_REGINFO \
- )
+ CFG_CMD_CACHE | \
+ CFG_CMD_DATE | \
+ CFG_CMD_ELF | \
+ CFG_CMD_FLASH | \
+ (CFG_CMD_LOADB | CFG_CMD_LOADS) | \
+ CFG_CMD_MEMORY | \
+ CFG_CMD_MISC | \
+ CFG_CMD_MII | \
+ CFG_CMD_NET | \
+ CFG_CMD_PING | \
+ CFG_CMD_REGINFO \
+ )
+
+#define CFG_UNIFY_CACHE
#define CONFIG_MCFFEC
#ifdef CONFIG_MCFFEC