mmc: meson-gx: change clock phase value on SM1 SoCs
Amlogic SM1 SoCs doesn't work over 50MHz. When phase sets to 270', it's
working fine over 50MHz on Amlogic SM1 SoCs.
Since Other Amlogic SoCs doens't report an issue, phase value is using
to 180' by default.
To distinguish which value is used adds an u-boot only sm1 compatible.
In future, it needs to find what value is a proper about each SoCs.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Tested-by: Anand Moon <linux.amoon@gmail.com>
diff --git a/drivers/mmc/meson_gx_mmc.h b/drivers/mmc/meson_gx_mmc.h
index b4544b5..92aec53 100644
--- a/drivers/mmc/meson_gx_mmc.h
+++ b/drivers/mmc/meson_gx_mmc.h
@@ -9,6 +9,11 @@
#include <mmc.h>
#include <linux/bitops.h>
+enum meson_gx_mmc_compatible {
+ MMC_COMPATIBLE_GX,
+ MMC_COMPATIBLE_SM1,
+};
+
#define SDIO_PORT_A 0
#define SDIO_PORT_B 1
#define SDIO_PORT_C 2