Merge remote-tracking branch 'u-boot-ti/master' into m
diff --git a/arch/arm/cpu/armv7/am33xx/board.c b/arch/arm/cpu/armv7/am33xx/board.c
index b387ac2..ecc2671 100644
--- a/arch/arm/cpu/armv7/am33xx/board.c
+++ b/arch/arm/cpu/armv7/am33xx/board.c
@@ -37,7 +37,6 @@
DECLARE_GLOBAL_DATA_PTR;
struct wd_timer *wdtimer = (struct wd_timer *)WDT_BASE;
-struct gptimer *timer_base = (struct gptimer *)CONFIG_SYS_TIMERBASE;
struct uart_sys *uart_base = (struct uart_sys *)DEFAULT_UART_BASE;
static const struct gpio_bank gpio_bank_am33xx[4] = {
@@ -119,22 +118,6 @@
#define UART_SMART_IDLE_EN (0x1 << 0x3)
#endif
-#ifdef CONFIG_SPL_BUILD
-/* Initialize timer */
-static void init_timer(void)
-{
- /* Reset the Timer */
- writel(0x2, (&timer_base->tscir));
-
- /* Wait until the reset is done */
- while (readl(&timer_base->tiocp_cfg) & 1)
- ;
-
- /* Start the Timer */
- writel(0x1, (&timer_base->tclr));
-}
-#endif
-
/*
* Determine what type of DDR we have.
*/
@@ -183,9 +166,6 @@
regVal |= UART_SMART_IDLE_EN;
writel(regVal, &uart_base->uartsyscfg);
- /* Initialize the Timer */
- init_timer();
-
preloader_console_init();
/* Initalize the board header */
diff --git a/arch/arm/include/asm/arch-omap3/dss.h b/arch/arm/include/asm/arch-omap3/dss.h
index a830c43..54add4b 100644
--- a/arch/arm/include/asm/arch-omap3/dss.h
+++ b/arch/arm/include/asm/arch-omap3/dss.h
@@ -142,7 +142,6 @@
};
/* Few Register Offsets */
-#define FRAME_MODE_SHIFT 1
#define TFTSTN_SHIFT 3
#define DATALINES_SHIFT 8
@@ -182,6 +181,16 @@
void *frame_buffer;
};
+#define DSS_HBP(bp) (((bp) - 1) << 20)
+#define DSS_HFP(fp) (((fp) - 1) << 8)
+#define DSS_HSW(sw) ((sw) - 1)
+#define DSS_VBP(bp) ((bp) << 20)
+#define DSS_VFP(fp) ((fp) << 8)
+#define DSS_VSW(sw) ((sw) - 1)
+
+#define PANEL_TIMING_H(bp, fp, sw) (DSS_HBP(bp) | DSS_HFP(fp) | DSS_HSW(sw))
+#define PANEL_TIMING_V(bp, fp, sw) (DSS_VBP(bp) | DSS_VFP(fp) | DSS_VSW(sw))
+
/* Generic DSS Functions */
void omap3_dss_venc_config(const struct venc_regs *venc_cfg,
u32 height, u32 width);
diff --git a/arch/arm/include/asm/arch-omap3/mux.h b/arch/arm/include/asm/arch-omap3/mux.h
index 71f183d..6e92b23 100644
--- a/arch/arm/include/asm/arch-omap3/mux.h
+++ b/arch/arm/include/asm/arch-omap3/mux.h
@@ -451,6 +451,11 @@
#define CONTROL_PADCONF_GPIO128 0x0A58
#define CONTROL_PADCONF_GPIO129 0x0A5A
+/* AM/DM37xx specific: gpio_127, gpio_127 and gpio_129 require configuration
+ * of the extended drain cells */
+#define OMAP34XX_CTRL_WKUP_CTRL (OMAP34XX_CTRL_BASE + 0x0A5C)
+#define OMAP34XX_CTRL_WKUP_CTRL_GPIO_IO_PWRDNZ (1<<6)
+
#define MUX_VAL(OFFSET,VALUE)\
writew((VALUE), OMAP34XX_CTRL_BASE + (OFFSET));
diff --git a/board/technexion/twister/twister.c b/board/technexion/twister/twister.c
index c2b10ac..7429e93 100644
--- a/board/technexion/twister/twister.c
+++ b/board/technexion/twister/twister.c
@@ -100,8 +100,18 @@
int misc_init_r(void)
{
+ char *eth_addr;
+
dieid_num_r();
+ eth_addr = getenv("ethaddr");
+ if (eth_addr)
+ return 0;
+
+#ifndef CONFIG_SPL_BUILD
+ TAM3517_READ_MAC_FROM_EEPROM;
+#endif
+
return 0;
}
diff --git a/board/teejet/mt_ventoux/mt_ventoux.c b/board/teejet/mt_ventoux/mt_ventoux.c
index 9fbaedd..b8ad447 100644
--- a/board/teejet/mt_ventoux/mt_ventoux.c
+++ b/board/teejet/mt_ventoux/mt_ventoux.c
@@ -21,13 +21,17 @@
#include <common.h>
#include <netdev.h>
+#include <malloc.h>
#include <fpga.h>
+#include <video_fb.h>
#include <asm/io.h>
#include <asm/arch/mem.h>
#include <asm/arch/mux.h>
#include <asm/arch/sys_proto.h>
#include <asm/omap_gpio.h>
#include <asm/arch/mmc_host_def.h>
+#include <asm/arch/dss.h>
+#include <asm/arch/clocks.h>
#include <i2c.h>
#include <spartan3.h>
#include <asm/gpio.h>
@@ -39,6 +43,9 @@
DECLARE_GLOBAL_DATA_PTR;
+#define BUZZER 140
+#define SPEAKER 141
+
#ifndef CONFIG_FPGA
#error "The Teejet mt_ventoux must have CONFIG_FPGA enabled"
#endif
@@ -50,6 +57,42 @@
#define FPGA_INIT 119
#define FPGA_DONE 154
+#define LCD_PWR 138
+#define LCD_PON_PIN 139
+
+#if defined(CONFIG_VIDEO) && !defined(CONFIG_SPL_BUILD)
+static struct {
+ u32 xres;
+ u32 yres;
+} panel_resolution[] = {
+ { 480, 272 },
+ { 800, 480 }
+};
+
+static struct panel_config lcd_cfg[] = {
+ {
+ .timing_h = PANEL_TIMING_H(4, 8, 41),
+ .timing_v = PANEL_TIMING_V(2, 4, 10),
+ .pol_freq = 0x00000000, /* Pol Freq */
+ .divisor = 0x0001000d, /* 33Mhz Pixel Clock */
+ .panel_type = 0x01, /* TFT */
+ .data_lines = 0x03, /* 24 Bit RGB */
+ .load_mode = 0x02, /* Frame Mode */
+ .panel_color = 0,
+ },
+ {
+ .timing_h = PANEL_TIMING_H(20, 192, 4),
+ .timing_v = PANEL_TIMING_V(2, 20, 10),
+ .pol_freq = 0x00004000, /* Pol Freq */
+ .divisor = 0x0001000E, /* 36Mhz Pixel Clock */
+ .panel_type = 0x01, /* TFT */
+ .data_lines = 0x03, /* 24 Bit RGB */
+ .load_mode = 0x02, /* Frame Mode */
+ .panel_color = 0,
+ }
+};
+#endif
+
/* Timing definitions for FPGA */
static const u32 gpmc_fpga[] = {
FPGA_GPMC_CONFIG1,
@@ -193,6 +236,33 @@
mt_ventoux_init_fpga();
+ /* GPIO_140: speaker #mute */
+ MUX_VAL(CP(MCBSP3_DX), (IEN | PTU | EN | M4))
+ /* GPIO_141: Buzz Hi */
+ MUX_VAL(CP(MCBSP3_DR), (IEN | PTU | EN | M4))
+
+ /* Turning off the buzzer */
+ gpio_request(BUZZER, "BUZZER_MUTE");
+ gpio_request(SPEAKER, "SPEAKER");
+ gpio_direction_output(BUZZER, 0);
+ gpio_direction_output(SPEAKER, 0);
+
+ return 0;
+}
+
+int misc_init_r(void)
+{
+ char *eth_addr;
+
+ dieid_num_r();
+
+ eth_addr = getenv("ethaddr");
+ if (eth_addr)
+ return 0;
+
+#ifndef CONFIG_SPL_BUILD
+ TAM3517_READ_MAC_FROM_EEPROM;
+#endif
return 0;
}
@@ -224,3 +294,46 @@
return omap_mmc_init(0, 0, 0);
}
#endif
+
+#if defined(CONFIG_VIDEO) && !defined(CONFIG_SPL_BUILD)
+int board_video_init(void)
+{
+ struct prcm *prcm_base = (struct prcm *)PRCM_BASE;
+ struct panel_config *panel = &lcd_cfg[0];
+ char *s;
+ u32 index = 0;
+
+ void *fb;
+
+ fb = (void *)0x88000000;
+
+ s = getenv("panel");
+ if (s) {
+ index = simple_strtoul(s, NULL, 10);
+ if (index < ARRAY_SIZE(lcd_cfg))
+ panel = &lcd_cfg[index];
+ else
+ return 0;
+ }
+
+ panel->frame_buffer = fb;
+ printf("Panel: %dx%d\n", panel_resolution[index].xres,
+ panel_resolution[index].yres);
+ panel->lcd_size = (panel_resolution[index].yres - 1) << 16 |
+ (panel_resolution[index].xres - 1);
+
+ gpio_request(LCD_PWR, "LCD Power");
+ gpio_request(LCD_PON_PIN, "LCD Pon");
+ gpio_direction_output(LCD_PWR, 0);
+ gpio_direction_output(LCD_PON_PIN, 1);
+
+
+ setbits_le32(&prcm_base->fclken_dss, FCK_DSS_ON);
+ setbits_le32(&prcm_base->iclken_dss, ICK_DSS_ON);
+
+ omap3_dss_panel_config(panel);
+ omap3_dss_enable();
+
+ return 0;
+}
+#endif
diff --git a/board/teejet/mt_ventoux/mt_ventoux.h b/board/teejet/mt_ventoux/mt_ventoux.h
index 9b2e43e..1cd7ec2 100644
--- a/board/teejet/mt_ventoux/mt_ventoux.h
+++ b/board/teejet/mt_ventoux/mt_ventoux.h
@@ -142,7 +142,8 @@
/*GPIO_62: FPGA_RESET */ \
MUX_VAL(CP(GPMC_WAIT0), (IEN | PTU | EN | M4)) \
MUX_VAL(CP(GPMC_WAIT1), (IEN | PTU | EN | M4)) \
- MUX_VAL(CP(GPMC_WAIT2), (IEN | PTU | EN | M4)) /*GPIO_64*/ \
+ MUX_VAL(CP(GPMC_WAIT2), (IEN | PTU | EN | M4)) \
+ /* GPIO_64*/ \
MUX_VAL(CP(GPMC_WAIT3), (IEN | PTU | EN | M4)) \
/* DSS */\
MUX_VAL(CP(DSS_PCLK), (IDIS | PTD | DIS | M0)) \
@@ -174,26 +175,6 @@
MUX_VAL(CP(DSS_DATA22), (IDIS | PTD | DIS | M0)) \
MUX_VAL(CP(DSS_DATA23), (IDIS | PTD | DIS | M0)) \
/* CAMERA */\
- MUX_VAL(CP(CAM_HS), (IEN | PTU | EN | M0)) \
- MUX_VAL(CP(CAM_VS), (IEN | PTU | EN | M0)) \
- MUX_VAL(CP(CAM_XCLKA), (IDIS | PTD | DIS | M0)) \
- MUX_VAL(CP(CAM_PCLK), (IEN | PTU | EN | M0)) \
- MUX_VAL(CP(CAM_FLD), (IDIS | PTD | DIS | M4)) /*GPIO_98*/\
- MUX_VAL(CP(CAM_D0), (IEN | PTD | DIS | M0)) \
- MUX_VAL(CP(CAM_D1), (IEN | PTD | DIS | M0)) \
- MUX_VAL(CP(CAM_D2), (IEN | PTD | DIS | M0)) \
- MUX_VAL(CP(CAM_D3), (IEN | PTD | DIS | M0)) \
- MUX_VAL(CP(CAM_D4), (IEN | PTD | DIS | M0)) \
- MUX_VAL(CP(CAM_D5), (IEN | PTD | DIS | M0)) \
- MUX_VAL(CP(CAM_D6), (IEN | PTD | DIS | M0)) \
- MUX_VAL(CP(CAM_D7), (IEN | PTD | DIS | M0)) \
- MUX_VAL(CP(CAM_D8), (IEN | PTD | DIS | M0)) \
- MUX_VAL(CP(CAM_D9), (IEN | PTD | DIS | M0)) \
- MUX_VAL(CP(CAM_D10), (IEN | PTD | DIS | M0)) \
- MUX_VAL(CP(CAM_D11), (IEN | PTD | DIS | M0)) \
- MUX_VAL(CP(CAM_XCLKB), (IDIS | PTD | DIS | M0)) \
- MUX_VAL(CP(CAM_WEN), (IEN | PTD | DIS | M4)) /*GPIO_167*/\
- MUX_VAL(CP(CAM_STROBE), (IDIS | PTD | DIS | M0)) \
MUX_VAL(CP(CSI2_DX0), (IEN | PTD | DIS | M0)) \
MUX_VAL(CP(CSI2_DY0), (IEN | PTD | DIS | M0)) \
MUX_VAL(CP(CSI2_DX1), (IEN | PTD | DIS | M0)) \
@@ -209,6 +190,7 @@
/* GPIO_126: CardDetect */\
MUX_VAL(CP(MMC1_DAT5), (IEN | PTU | EN | M4)) \
MUX_VAL(CP(MMC1_DAT6), (IEN | PTU | EN | M4)) \
+ /*GPIO_128 */ \
MUX_VAL(CP(MMC1_DAT7), (IEN | PTU | EN | M4)) \
\
MUX_VAL(CP(MMC2_CLK), (IEN | PTU | EN | M0)) /*MMC2_CLK*/\
@@ -221,7 +203,7 @@
MUX_VAL(CP(MMC2_DAT5), (IDIS | PTU | EN | M4)) \
MUX_VAL(CP(MMC2_DAT6), (IDIS | PTU | EN | M4)) \
/* GPIO_138: LCD_ENVD */\
- MUX_VAL(CP(MMC2_DAT7), (IDIS | PTU | EN | M4)) \
+ MUX_VAL(CP(MMC2_DAT7), (IDIS | PTD | EN | M4)) \
/* GPIO_139: LCD_PON */\
/* McBSP */\
MUX_VAL(CP(MCBSP_CLKS), (IEN | PTU | DIS | M0)) \
@@ -241,16 +223,12 @@
MUX_VAL(CP(MCBSP2_DX), (IEN | PTD | EN | M4)) \
/* GPIO_119: FPGA_INIT */ \
\
- MUX_VAL(CP(MCBSP3_DX), (IEN | PTU | EN | M4)) \
- /* GPIO_140: speaker #mute */\
- MUX_VAL(CP(MCBSP3_DR), (IEN | PTU | EN | M4)) \
- /* GPIO_141: Buzz Hi */\
MUX_VAL(CP(MCBSP3_CLKX), (IEN | PTU | EN | M4)) \
MUX_VAL(CP(MCBSP3_FSX), (IEN | PTU | EN | M4)) \
\
MUX_VAL(CP(MCBSP4_CLKX), (IEN | PTD | DIS | M4)) \
/*GPIO_152: Ignition Sense */ \
- MUX_VAL(CP(MCBSP4_DR), (IDIS | PTD | DIS | M4)) \
+ MUX_VAL(CP(MCBSP4_DR), (IEN | PTD | DIS | M4)) \
/*GPIO_153: Power Button Sense */ \
MUX_VAL(CP(MCBSP4_DX), (IEN | PTU | DIS | M4)) \
/* GPIO_154: FPGA_DONE */ \
@@ -264,10 +242,14 @@
/* GPIO_150: USB status 1 */\
\
MUX_VAL(CP(UART1_RX), (IEN | PTD | DIS | M0)) \
- MUX_VAL(CP(UART2_CTS), (IEN | PTU | EN | M0)) \
- MUX_VAL(CP(UART2_RTS), (IDIS | PTD | DIS | M0)) \
- MUX_VAL(CP(UART2_TX), (IDIS | PTD | DIS | M0)) \
- MUX_VAL(CP(UART2_RX), (IEN | PTD | DIS | M0)) \
+ MUX_VAL(CP(UART2_CTS), (IEN | PTU | EN | M2)) \
+ /* gpt9_pwm */\
+ MUX_VAL(CP(UART2_RTS), (IEN | PTD | DIS | M2)) \
+ /* gpt10_pwm */\
+ MUX_VAL(CP(UART2_TX), (IEN | PTD | DIS | M2)) \
+ /* gpt8_pwm */\
+ MUX_VAL(CP(UART2_RX), (IEN | PTD | DIS | M2)) \
+ /* gpt11_pwm */\
\
MUX_VAL(CP(UART3_CTS_RCTX), (IDIS | PTD | DIS | M4)) \
/*GPIO_163 : TS_PENIRQ*/ \
@@ -299,22 +281,24 @@
MUX_VAL(CP(MCSPI2_CS0), (IEN | PTD | EN | M4)) \
MUX_VAL(CP(MCSPI2_CS1), (IEN | PTD | EN | M0)) \
/* CCDC */\
- MUX_VAL(CP(CCDC_PCLK), (IEN | PTU | EN | M0)) \
+ MUX_VAL(CP(CCDC_PCLK), (IEN | PTU | EN | M4)) \
+ /* GPIO94 */\
MUX_VAL(CP(CCDC_FIELD), (IEN | PTD | DIS | M4)) \
/* GPIO95: #Enable Output */\
- MUX_VAL(CP(CCDC_HD), (IEN | PTU | EN | M0)) \
- MUX_VAL(CP(CCDC_VD), (IEN | PTU | EN | M0)) \
+ MUX_VAL(CP(CCDC_HD), (IEN | PTU | EN | M4)) \
+ MUX_VAL(CP(CCDC_VD), (IEN | PTU | EN | M4)) \
MUX_VAL(CP(CCDC_WEN), (IEN | PTD | DIS | M4)) \
/* GPIO 99: #SOM_PWR_OFF */\
- MUX_VAL(CP(CCDC_DATA0), (IEN | PTD | DIS | M0)) \
+ MUX_VAL(CP(CCDC_DATA0), (IEN | PTD | DIS | M4)) \
MUX_VAL(CP(CCDC_DATA1), (IEN | PTD | DIS | M4)) \
/* GPIO_100: #power out */\
- MUX_VAL(CP(CCDC_DATA2), (IEN | PTD | DIS | M0)) \
- MUX_VAL(CP(CCDC_DATA3), (IEN | PTD | DIS | M0)) \
- MUX_VAL(CP(CCDC_DATA4), (IEN | PTD | DIS | M0)) \
- MUX_VAL(CP(CCDC_DATA5), (IEN | PTD | DIS | M0)) \
- MUX_VAL(CP(CCDC_DATA6), (IEN | PTD | DIS | M0)) \
- MUX_VAL(CP(CCDC_DATA7), (IEN | PTD | DIS | M0)) \
+ MUX_VAL(CP(CCDC_DATA2), (IEN | PTD | DIS | M4)) \
+ MUX_VAL(CP(CCDC_DATA3), (IEN | PTD | DIS | M4)) \
+ /* GPIO_102 */\
+ MUX_VAL(CP(CCDC_DATA4), (IEN | PTD | DIS | M4)) \
+ MUX_VAL(CP(CCDC_DATA5), (IEN | PTD | DIS | M4)) \
+ MUX_VAL(CP(CCDC_DATA6), (IEN | PTD | DIS | M4)) \
+ MUX_VAL(CP(CCDC_DATA7), (IEN | PTD | DIS | M4)) \
/* RMII */\
MUX_VAL(CP(RMII_MDIO_DATA), (IEN | M0)) \
MUX_VAL(CP(RMII_MDIO_CLK), (M0)) \
@@ -363,7 +347,8 @@
MUX_VAL(CP(SYS_BOOT8), (IEN | PTD | EN | M0)) \
\
MUX_VAL(CP(SYS_OFF_MODE), (IEN | PTD | DIS | M0)) \
- MUX_VAL(CP(SYS_CLKOUT1), (IEN | PTD | DIS | M0)) \
+ MUX_VAL(CP(SYS_CLKOUT1), (IDIS | PTD | DIS | M4)) \
+ /* gpio_10 */\
MUX_VAL(CP(SYS_CLKOUT2), (IEN | PTU | EN | M0)) \
/* JTAG */\
MUX_VAL(CP(JTAG_nTRST), (IEN | PTD | DIS | M0)) \
@@ -387,12 +372,15 @@
MUX_VAL(CP(ETK_D7_ES2), (IEN | PTU | EN | M3)) \
MUX_VAL(CP(ETK_D8_ES2), (IEN | PTD | EN | M3)) \
MUX_VAL(CP(ETK_D9_ES2), (IEN | PTD | EN | M3)) \
- MUX_VAL(CP(ETK_D10_ES2), (IEN | PTU | EN | M4)) \
+ MUX_VAL(CP(ETK_D10_ES2), (IDIS | PTD | EN | M4)) \
+ /* gpio_24 */\
MUX_VAL(CP(ETK_D11_ES2), (IDIS | PTD | DIS | M4)) \
- MUX_VAL(CP(ETK_D12_ES2), (IEN | PTD | DIS | M3)) \
+ MUX_VAL(CP(ETK_D12_ES2), (IEN | PTD | DIS | M4)) \
+ /* gpio_26 */\
MUX_VAL(CP(ETK_D13_ES2), (IEN | PTD | DIS | M3)) \
- MUX_VAL(CP(ETK_D14_ES2), (IEN | PTD | DIS | M3)) \
- MUX_VAL(CP(ETK_D15_ES2), (IEN | PTD | DIS | M3)) \
+ MUX_VAL(CP(ETK_D14_ES2), (IEN | PTD | DIS | M4)) \
+ MUX_VAL(CP(ETK_D15_ES2), (IEN | PTD | DIS | M4)) \
+ /* gpio_29 */\
/* Die to Die */\
MUX_VAL(CP(D2D_MCAD34), (IEN | PTD | EN | M0)) \
MUX_VAL(CP(D2D_MCAD35), (IEN | PTD | EN | M0)) \
diff --git a/drivers/video/omap3_dss.c b/drivers/video/omap3_dss.c
index 6686718..b1424bf 100644
--- a/drivers/video/omap3_dss.c
+++ b/drivers/video/omap3_dss.c
@@ -112,7 +112,7 @@
writel(panel_cfg->pol_freq, &dispc->pol_freq);
writel(panel_cfg->divisor, &dispc->divisor);
writel(panel_cfg->lcd_size, &dispc->size_lcd);
- writel(panel_cfg->load_mode << FRAME_MODE_SHIFT, &dispc->config);
+ writel(panel_cfg->load_mode << LOADMODE_SHIFT, &dispc->config);
writel(panel_cfg->panel_type << TFTSTN_SHIFT |
panel_cfg->data_lines << DATALINES_SHIFT, &dispc->control);
writel(panel_cfg->panel_color, &dispc->default_color0);
@@ -121,7 +121,6 @@
if (!panel_cfg->frame_buffer)
return;
- writel(panel_cfg->load_mode << LOADMODE_SHIFT, &dispc->config);
writel(8 << GFX_FORMAT_SHIFT | GFX_ENABLE, &dispc->gfx_attributes);
writel(1, &dispc->gfx_row_inc);
writel(1, &dispc->gfx_pixel_inc);
diff --git a/include/configs/mt_ventoux.h b/include/configs/mt_ventoux.h
index 5db6d57..8d35943 100644
--- a/include/configs/mt_ventoux.h
+++ b/include/configs/mt_ventoux.h
@@ -2,6 +2,9 @@
* Copyright (C) 2011
* Stefano Babic, DENX Software Engineering, sbabic@denx.de.
*
+ *
+ * Configuration settings for the Teejet mt_ventoux board.
+ *
* Copyright (C) 2009 TechNexion Ltd.
*
* This program is free software; you can redistribute it and/or modify
@@ -24,6 +27,10 @@
#include "tam3517-common.h"
+#undef CONFIG_SYS_MALLOC_LEN
+#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10) + \
+ 6 * 1024 * 1024)
+
#define MACH_TYPE_AM3517_MT_VENTOUX 3832
#define CONFIG_MACH_TYPE MACH_TYPE_AM3517_MT_VENTOUX
@@ -31,6 +38,7 @@
#define CONFIG_BOOTFILE "uImage"
#define CONFIG_AUTO_COMPLETE
+#define CONFIG_OMAP3_GPIO_4
#define CONFIG_HOSTNAME mt_ventoux
/*
@@ -62,6 +70,15 @@
#define CONFIG_FPGA_DELAY() udelay(1)
#define CONFIG_SYS_FPGA_PROG_FEEDBACK
+#define CONFIG_VIDEO
+#define CONFIG_CFB_CONSOLE
+#define CONFIG_VGA_AS_SINGLE_DEVICE
+#define CONFIG_SPLASH_SCREEN
+#define CONFIG_VIDEO_BMP_RLE8
+#define CONFIG_CMD_BMP
+#define CONFIG_VIDEO_OMAP3 /* DSS Support */
+#define CONFIG_SYS_CONSOLE_IS_IN_ENV
+
#define CONFIG_EXTRA_ENV_SETTINGS CONFIG_TAM3517_SETTINGS \
"bootcmd=run net_nfs\0"
diff --git a/include/configs/tam3517-common.h b/include/configs/tam3517-common.h
index 375265d..a13fd93 100644
--- a/include/configs/tam3517-common.h
+++ b/include/configs/tam3517-common.h
@@ -124,6 +124,7 @@
#define CONFIG_CMD_NAND /* NAND support */
#define CONFIG_CMD_PING
#define CONFIG_CMD_USB
+#define CONFIG_CMD_EEPROM
#undef CONFIG_CMD_FLASH /* only NAND on the SOM */
#undef CONFIG_CMD_IMLS
@@ -134,6 +135,9 @@
#define CONFIG_SYS_I2C_SLAVE 1
#define CONFIG_SYS_I2C_BUS 0
#define CONFIG_SYS_I2C_BUS_SELECT 1
+#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* base address */
+#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* bytes of address */
+#define CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW 0x07
#define CONFIG_DRIVER_OMAP34XX_I2C
@@ -347,4 +351,66 @@
"fi;" \
"else echo U-Boot not downloaded..exiting;fi\0" \
+
+/*
+ * this is common code for all TAM3517 boards.
+ * MAC address is stored from manufacturer in
+ * I2C EEPROM
+ */
+#if !(defined(__KERNEL_STRICT_NAMES) || defined(__ASSEMBLY__))
+
+/*
+ * The I2C EEPROM on the TAM3517 contains
+ * mac address and production data
+ */
+struct tam3517_module_info {
+ char customer[48];
+ char product[48];
+
+ /*
+ * bit 0~47 : sequence number
+ * bit 48~55 : week of year, from 0.
+ * bit 56~63 : year
+ */
+ unsigned long long sequence_number;
+
+ /*
+ * bit 0~7 : revision fixed
+ * bit 8~15 : revision major
+ * bit 16~31 : TNxxx
+ */
+ unsigned int revision;
+ unsigned char eth_addr[4][8];
+ unsigned char _rev[100];
+};
+
+#define TAM3517_READ_MAC_FROM_EEPROM \
+do { \
+ struct tam3517_module_info info;\
+ char buf[80], ethname[20]; \
+ int i; \
+ i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); \
+ if (eeprom_read(CONFIG_SYS_I2C_EEPROM_ADDR, 0, \
+ (void *)&info, sizeof(info))) \
+ break; \
+ memset(buf, 0, sizeof(buf)); \
+ for (i = 0 ; i < ARRAY_SIZE(info.eth_addr); i++) { \
+ sprintf(buf, "%02X:%02X:%02X:%02X:%02X:%02X", \
+ info.eth_addr[i][5], \
+ info.eth_addr[i][4], \
+ info.eth_addr[i][3], \
+ info.eth_addr[i][2], \
+ info.eth_addr[i][1], \
+ info.eth_addr[i][0]); \
+ \
+ if (i) \
+ sprintf(ethname, "eth%daddr", i); \
+ else \
+ sprintf(ethname, "ethaddr"); \
+ printf("Setting %s from EEPROM with %s\n", ethname, buf);\
+ setenv(ethname, buf); \
+ } \
+} while (0)
+#endif
+
#endif /* __TAM3517_H */