tegra20: rename tegra2 -> tegra20
This is make naming consistent with the kernel and devicetree and in
preparation of pulling out the common tegra20 code.
Signed-off-by: Allen Martin <amartin@nvidia.com>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Tested-by: Thierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: Tom Warren <twarren@nvidia.com>
diff --git a/drivers/gpio/tegra_gpio.c b/drivers/gpio/tegra_gpio.c
index 60ec6e3..8cfcf82 100644
--- a/drivers/gpio/tegra_gpio.c
+++ b/drivers/gpio/tegra_gpio.c
@@ -1,5 +1,5 @@
/*
- * NVIDIA Tegra2 GPIO handling.
+ * NVIDIA Tegra20 GPIO handling.
* (C) Copyright 2010-2012
* NVIDIA Corporation <www.nvidia.com>
*
@@ -30,14 +30,14 @@
#include <common.h>
#include <asm/io.h>
#include <asm/bitops.h>
-#include <asm/arch/tegra2.h>
+#include <asm/arch/tegra20.h>
#include <asm/gpio.h>
enum {
- TEGRA2_CMD_INFO,
- TEGRA2_CMD_PORT,
- TEGRA2_CMD_OUTPUT,
- TEGRA2_CMD_INPUT,
+ TEGRA20_CMD_INFO,
+ TEGRA20_CMD_PORT,
+ TEGRA20_CMD_OUTPUT,
+ TEGRA20_CMD_INPUT,
};
static struct gpio_names {
diff --git a/drivers/i2c/tegra_i2c.c b/drivers/i2c/tegra_i2c.c
index 5b6ea0e..b4eb491 100644
--- a/drivers/i2c/tegra_i2c.c
+++ b/drivers/i2c/tegra_i2c.c
@@ -262,7 +262,7 @@
return error;
}
-static int tegra2_i2c_write_data(u32 addr, u8 *data, u32 len)
+static int tegra20_i2c_write_data(u32 addr, u8 *data, u32 len)
{
int error;
struct i2c_trans_info trans_info;
@@ -275,12 +275,12 @@
error = send_recv_packets(&i2c_controllers[i2c_bus_num], &trans_info);
if (error)
- debug("tegra2_i2c_write_data: Error (%d) !!!\n", error);
+ debug("tegra20_i2c_write_data: Error (%d) !!!\n", error);
return error;
}
-static int tegra2_i2c_read_data(u32 addr, u8 *data, u32 len)
+static int tegra20_i2c_read_data(u32 addr, u8 *data, u32 len)
{
int error;
struct i2c_trans_info trans_info;
@@ -293,7 +293,7 @@
error = send_recv_packets(&i2c_controllers[i2c_bus_num], &trans_info);
if (error)
- debug("tegra2_i2c_read_data: Error (%d) !!!\n", error);
+ debug("tegra20_i2c_read_data: Error (%d) !!!\n", error);
return error;
}
@@ -438,7 +438,7 @@
debug("\n");
/* Shift 7-bit address over for lower-level i2c functions */
- rc = tegra2_i2c_write_data(chip << 1, buffer, len);
+ rc = tegra20_i2c_write_data(chip << 1, buffer, len);
if (rc)
debug("i2c_write_data(): rc=%d\n", rc);
@@ -452,7 +452,7 @@
debug("inside i2c_read_data():\n");
/* Shift 7-bit address over for lower-level i2c functions */
- rc = tegra2_i2c_read_data(chip << 1, buffer, len);
+ rc = tegra20_i2c_read_data(chip << 1, buffer, len);
if (rc) {
debug("i2c_read_data(): rc=%d\n", rc);
return rc;
diff --git a/drivers/input/Makefile b/drivers/input/Makefile
index 5c831b2..68c6a16 100644
--- a/drivers/input/Makefile
+++ b/drivers/input/Makefile
@@ -26,7 +26,7 @@
LIB := $(obj)libinput.o
COBJS-$(CONFIG_I8042_KBD) += i8042.o
-COBJS-$(CONFIG_TEGRA2_KEYBOARD) += tegra-kbc.o
+COBJS-$(CONFIG_TEGRA20_KEYBOARD) += tegra-kbc.o
ifdef CONFIG_PS2KBD
COBJS-y += keyboard.o pc_keyb.o
COBJS-$(CONFIG_PS2MULT) += ps2mult.o ps2ser.o
diff --git a/drivers/mmc/tegra_mmc.c b/drivers/mmc/tegra_mmc.c
index 29bf583..ddfa727 100644
--- a/drivers/mmc/tegra_mmc.c
+++ b/drivers/mmc/tegra_mmc.c
@@ -39,31 +39,31 @@
* @param host Structure to fill in (base, reg, mmc_id)
* @param dev_index Device index (0-3)
*/
-static void tegra2_get_setup(struct mmc_host *host, int dev_index)
+static void tegra20_get_setup(struct mmc_host *host, int dev_index)
{
- debug("tegra2_get_base_mmc: dev_index = %d\n", dev_index);
+ debug("tegra20_get_base_mmc: dev_index = %d\n", dev_index);
switch (dev_index) {
case 1:
- host->base = TEGRA2_SDMMC3_BASE;
+ host->base = TEGRA20_SDMMC3_BASE;
host->mmc_id = PERIPH_ID_SDMMC3;
break;
case 2:
- host->base = TEGRA2_SDMMC2_BASE;
+ host->base = TEGRA20_SDMMC2_BASE;
host->mmc_id = PERIPH_ID_SDMMC2;
break;
case 3:
- host->base = TEGRA2_SDMMC1_BASE;
+ host->base = TEGRA20_SDMMC1_BASE;
host->mmc_id = PERIPH_ID_SDMMC1;
break;
case 0:
default:
- host->base = TEGRA2_SDMMC4_BASE;
+ host->base = TEGRA20_SDMMC4_BASE;
host->mmc_id = PERIPH_ID_SDMMC4;
break;
}
- host->reg = (struct tegra2_mmc *)host->base;
+ host->reg = (struct tegra20_mmc *)host->base;
}
static void mmc_prepare_data(struct mmc_host *host, struct mmc_data *data)
@@ -345,7 +345,7 @@
debug(" mmc_change_clock called\n");
/*
- * Change Tegra2 SDMMCx clock divisor here. Source is 216MHz,
+ * Change Tegra20 SDMMCx clock divisor here. Source is 216MHz,
* PLLP_OUT0
*/
if (clock == 0)
@@ -494,11 +494,11 @@
return 0;
}
-int tegra2_mmc_getcd(struct mmc *mmc)
+int tegra20_mmc_getcd(struct mmc *mmc)
{
struct mmc_host *host = (struct mmc_host *)mmc->priv;
- debug("tegra2_mmc_getcd called\n");
+ debug("tegra20_mmc_getcd called\n");
if (host->cd_gpio >= 0)
return !gpio_get_value(host->cd_gpio);
@@ -506,13 +506,13 @@
return 1;
}
-int tegra2_mmc_init(int dev_index, int bus_width, int pwr_gpio, int cd_gpio)
+int tegra20_mmc_init(int dev_index, int bus_width, int pwr_gpio, int cd_gpio)
{
struct mmc_host *host;
char gpusage[12]; /* "SD/MMCn PWR" or "SD/MMCn CD" */
struct mmc *mmc;
- debug(" tegra2_mmc_init: index %d, bus width %d "
+ debug(" tegra20_mmc_init: index %d, bus width %d "
"pwr_gpio %d cd_gpio %d\n",
dev_index, bus_width, pwr_gpio, cd_gpio);
@@ -521,7 +521,7 @@
host->clock = 0;
host->pwr_gpio = pwr_gpio;
host->cd_gpio = cd_gpio;
- tegra2_get_setup(host, dev_index);
+ tegra20_get_setup(host, dev_index);
clock_start_periph_pll(host->mmc_id, CLOCK_ID_PERIPH, 20000000);
@@ -539,12 +539,12 @@
mmc = &mmc_dev[dev_index];
- sprintf(mmc->name, "Tegra2 SD/MMC");
+ sprintf(mmc->name, "Tegra20 SD/MMC");
mmc->priv = host;
mmc->send_cmd = mmc_send_cmd;
mmc->set_ios = mmc_set_ios;
mmc->init = mmc_core_init;
- mmc->getcd = tegra2_mmc_getcd;
+ mmc->getcd = tegra20_mmc_getcd;
mmc->voltages = MMC_VDD_32_33 | MMC_VDD_33_34 | MMC_VDD_165_195;
if (bus_width == 8)
@@ -559,7 +559,7 @@
* max freq is highest HS eMMC clock as per the SD/MMC spec
* (actually 52MHz)
* Both of these are the closest equivalents w/216MHz source
- * clock and Tegra2 SDMMC divisors.
+ * clock and Tegra20 SDMMC divisors.
*/
mmc->f_min = 375000;
mmc->f_max = 48000000;
diff --git a/drivers/mmc/tegra_mmc.h b/drivers/mmc/tegra_mmc.h
index f9cdcaa..b1f2564 100644
--- a/drivers/mmc/tegra_mmc.h
+++ b/drivers/mmc/tegra_mmc.h
@@ -22,13 +22,13 @@
#ifndef __TEGRA_MMC_H_
#define __TEGRA_MMC_H_
-#define TEGRA2_SDMMC1_BASE 0xC8000000
-#define TEGRA2_SDMMC2_BASE 0xC8000200
-#define TEGRA2_SDMMC3_BASE 0xC8000400
-#define TEGRA2_SDMMC4_BASE 0xC8000600
+#define TEGRA20_SDMMC1_BASE 0xC8000000
+#define TEGRA20_SDMMC2_BASE 0xC8000200
+#define TEGRA20_SDMMC3_BASE 0xC8000400
+#define TEGRA20_SDMMC4_BASE 0xC8000600
#ifndef __ASSEMBLY__
-struct tegra2_mmc {
+struct tegra20_mmc {
unsigned int sysad; /* _SYSTEM_ADDRESS_0 */
unsigned short blksize; /* _BLOCK_SIZE_BLOCK_COUNT_0 15:00 */
unsigned short blkcnt; /* _BLOCK_SIZE_BLOCK_COUNT_0 31:16 */
@@ -118,7 +118,7 @@
#define TEGRA_MMC_NORINTSIGEN_XFER_COMPLETE (1 << 1)
struct mmc_host {
- struct tegra2_mmc *reg;
+ struct tegra20_mmc *reg;
unsigned int version; /* SDHCI spec. version */
unsigned int clock; /* Current clock (MHz) */
unsigned int base; /* Base address, SDMMC1/2/3/4 */
diff --git a/drivers/spi/tegra_spi.c b/drivers/spi/tegra_spi.c
index 4a3e799..2355e02 100644
--- a/drivers/spi/tegra_spi.c
+++ b/drivers/spi/tegra_spi.c
@@ -54,7 +54,7 @@
int spi_cs_is_valid(unsigned int bus, unsigned int cs)
{
- /* Tegra2 SPI-Flash - only 1 device ('bus/cs') */
+ /* Tegra20 SPI-Flash - only 1 device ('bus/cs') */
if (bus != 0 || cs != 0)
return 0;
else
@@ -72,9 +72,9 @@
return NULL;
}
- if (max_hz > TEGRA2_SPI_MAX_FREQ) {
+ if (max_hz > TEGRA20_SPI_MAX_FREQ) {
printf("SPI error: unsupported frequency %d Hz. Max frequency"
- " is %d Hz\n", max_hz, TEGRA2_SPI_MAX_FREQ);
+ " is %d Hz\n", max_hz, TEGRA20_SPI_MAX_FREQ);
return NULL;
}
@@ -86,7 +86,7 @@
spi->slave.bus = bus;
spi->slave.cs = cs;
spi->freq = max_hz;
- spi->regs = (struct spi_tegra *)TEGRA2_SPI_BASE;
+ spi->regs = (struct spi_tegra *)TEGRA20_SPI_BASE;
spi->mode = mode;
return &spi->slave;
@@ -130,7 +130,7 @@
debug("spi_init: COMMAND = %08x\n", readl(®s->command));
/*
- * SPI pins on Tegra2 are muxed - change pinmux later due to UART
+ * SPI pins on Tegra20 are muxed - change pinmux later due to UART
* issue.
*/
pinmux_set_func(PINGRP_GMD, PMUX_FUNC_SFLASH);