clearfog: fast-blink the white LED early on
Now that we're using an I2C LED driver with no HW reset at CPU-reboot,
the "we're OK" indicators remained on even after reboot.
Fix this by reseting the LED driver via its SW reset, and then start
rapid blinking the status LED in white color (with a reduced duty cycle
and brightness so that it's still reasonably pleasant).
I'm not doing this from the U-Boot script because this approach allows
me to get before that three-second countdown for autoboot.
Change-Id: I2c908a036308d19c8a1b79a607b1c63ec01e8ba6
diff --git a/board/czechlight/clearfog/patches/u-boot/boot.patch b/board/czechlight/clearfog/patches/u-boot/boot.patch
index 104e986..969a854 100644
--- a/board/czechlight/clearfog/patches/u-boot/boot.patch
+++ b/board/czechlight/clearfog/patches/u-boot/boot.patch
@@ -93,7 +93,7 @@
compatible = "gpio-keys";
pinctrl-0 = <&rear_button_pins>;
diff --git a/board/solidrun/clearfog/clearfog.c b/board/solidrun/clearfog/clearfog.c
-index ede303d4eb..e5abda6f76 100644
+index ede303d4eb..17bf27f875 100644
--- a/board/solidrun/clearfog/clearfog.c
+++ b/board/solidrun/clearfog/clearfog.c
@@ -10,10 +10,15 @@
@@ -112,7 +112,7 @@
DECLARE_GLOBAL_DATA_PTR;
#define ETH_PHY_CTRL_REG 0
-@@ -124,6 +129,10 @@ int board_early_init_f(void)
+@@ -124,6 +129,54 @@ int board_early_init_f(void)
return 0;
}
@@ -120,10 +120,54 @@
+static struct udevice *watchdog_dev = NULL;
+#endif
+
++#define TLC59XXX_REG_MODE1 0x00
++#define TLC59XXX_REG_MODE2 0x01
++#define TLC59XXX_REG_PWM(LED) (LED + 0x02)
++#define TLC59XXX_REG_GRPPWM 0x12
++#define TLC59XXX_REG_GRPFREQ 0x13
++#define TLC59XXX_REG_LEDOUT0 0x14
++#define TLC59XXX_REG_LEDOUT1 0x15
++#define TLC59XXX_REG_LEDOUT2 0x16
++#define TLC59XXX_REG_LEDOUT3 0x17
++#define TLC59XXX_CHIP_RESET_ADDR 0x6b
++#define TLC59XXX_RESET_BYTE_0 0xa5
++#define TLC59XXX_RESET_BYTE_1 0x5a
++#define CLA_LED_CHIP_ADDR 0x60
++#define CLA_LED_STATUS_RED 8
++#define CLA_LED_STATUS_GREEN 9
++#define CLA_LED_STATUS_BLUE 10
++
++static struct marvell_io_exp led_config[] = {
++ { TLC59XXX_CHIP_RESET_ADDR, TLC59XXX_RESET_BYTE_0, TLC59XXX_RESET_BYTE_1 },
++ { CLA_LED_CHIP_ADDR, TLC59XXX_REG_MODE1, 0x01 }, /* enable oscillator */
++ { CLA_LED_CHIP_ADDR, TLC59XXX_REG_MODE2, 0x20 }, /* DMBLINK */
++ { CLA_LED_CHIP_ADDR, TLC59XXX_REG_GRPPWM, 0x40 }, /* 25% duty cycle */
++ { CLA_LED_CHIP_ADDR, TLC59XXX_REG_GRPFREQ, 0x03 }, /* very fast blinking */
++ { CLA_LED_CHIP_ADDR, TLC59XXX_REG_PWM(CLA_LED_STATUS_RED), 0x80 }, /* 50% brightness */
++ { CLA_LED_CHIP_ADDR, TLC59XXX_REG_PWM(CLA_LED_STATUS_GREEN), 0x80 }, /* 50% brightness */
++ { CLA_LED_CHIP_ADDR, TLC59XXX_REG_PWM(CLA_LED_STATUS_BLUE), 0x80 }, /* 50% brightness */
++ { CLA_LED_CHIP_ADDR, TLC59XXX_REG_LEDOUT2, 0x3f }, /* LEDs #8, 9, 10: mode 0b11 -> group blinking */
++};
++
++int cla_setup_leds(void)
++{
++ if (i2c_set_bus_num(1)) {
++ puts("Cannot select I2C bus 1");
++ return 1;
++ }
++ for (int i = 0; i < ARRAY_SIZE(led_config); i++) {
++ if (i2c_write(led_config[i].chip, led_config[i].addr, 1, &led_config[i].val, 1)) {
++ printf("LED config operation %d failed\n", i);
++ return 1;
++ }
++ }
++ return 0;
++}
++
int board_init(void)
{
int i;
-@@ -131,6 +140,18 @@ int board_init(void)
+@@ -131,6 +184,18 @@ int board_init(void)
/* Address of boot parameters */
gd->bd->bi_boot_params = mvebu_sdram_bar(0) + 0x100;
@@ -142,7 +186,12 @@
/* Toggle GPIO41 to reset onboard switch and phy */
clrbits_le32(MVEBU_GPIO1_BASE + 0x0, BIT(9));
clrbits_le32(MVEBU_GPIO1_BASE + 0x4, BIT(9));
-@@ -149,6 +170,28 @@ int board_init(void)
+@@ -146,9 +211,33 @@ int board_init(void)
+ for (i = 0; i < ARRAY_SIZE(io_exp); i++)
+ i2c_write(io_exp[i].chip, io_exp[i].addr, 1, &io_exp[i].val, 1);
+
++ cla_setup_leds();
++
return 0;
}
@@ -182,26 +231,26 @@
+CONFIG_WDT=y
+CONFIG_WDT_ORION=y
diff --git a/include/configs/clearfog.h b/include/configs/clearfog.h
-index f57f9b21ab..870bac78f4 100644
+index f57f9b21ab..b2ed0d5594 100644
--- a/include/configs/clearfog.h
+++ b/include/configs/clearfog.h
-@@ -25,9 +25,15 @@
+@@ -25,8 +25,15 @@
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_MVTWSI
#define CONFIG_I2C_MVTWSI_BASE0 MVEBU_TWSI_BASE
+#define CONFIG_I2C_MVTWSI_BASE1 MVEBU_TWSI1_BASE
#define CONFIG_SYS_I2C_SLAVE 0x0
#define CONFIG_SYS_I2C_SPEED 100000
-
++#define CONFIG_SYS_EEPROM_SIZE (128 * 1024)
++
+/* Watchdog */
+#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_WDT_ORION)
+# define CONFIG_WATCHDOG
+#endif
-+
+
/* SPI NOR flash default params, used by sf commands */
#define CONFIG_SF_DEFAULT_BUS 1
-
-@@ -54,6 +60,9 @@
+@@ -54,6 +61,9 @@
#define CONFIG_ENV_OFFSET 0xf0000
#define CONFIG_ENV_ADDR CONFIG_ENV_OFFSET
@@ -211,7 +260,7 @@
#define PHY_ANEG_TIMEOUT 8000 /* PHY needs a longer aneg time */
/* PCIe support */
-@@ -149,14 +158,45 @@
+@@ -149,14 +159,45 @@
"scriptaddr=" SCRIPT_ADDR_R "\0" \
"pxefile_addr_r=" PXEFILE_ADDR_R "\0"