clearfog: Don't require J18 for CS GPIO
This means that we won't need to abuse the RST pin hogging for a reset
signal. On the other hand, we will need a way of resetting these
peripherals automatically. I hope to be able to use a few gates which
just fires upon several CS pins being active at the same time because
that looks like a reasonable condition -- once the code to initialize
all CSes is upstream.
Change-Id: I68b4bfb5a2b42050fcf1223d2f6eeaee96cc3970
diff --git a/board/czechlight/clearfog/czechlight-clearfog.dts b/board/czechlight/clearfog/czechlight-clearfog.dts
index 1d9ad74..125e042 100644
--- a/board/czechlight/clearfog/czechlight-clearfog.dts
+++ b/board/czechlight/clearfog/czechlight-clearfog.dts
@@ -41,16 +41,6 @@
status = "disabled";
};
-&gpio0 {
- spi_reset {
- /* MPP29: defaults to 0 at boot time */
- gpio-hog;
- gpios = <29 GPIO_ACTIVE_LOW>;
- output-low;
- line-name = "SPI-reset";
- };
-};
-
&gpio1 {
spi_int {
/* MPP54: this needs an external pull-up */
@@ -62,7 +52,7 @@
};
&spi1 {
- cs-gpios = <0>, <&gpio0 22 GPIO_ACTIVE_HIGH>, <0>, <&gpio1 16 GPIO_ACTIVE_HIGH>;
+ cs-gpios = <0>, <&gpio0 22 GPIO_ACTIVE_HIGH>, <0>, <&gpio0 29 GPIO_ACTIVE_HIGH>;
max14830: max14830@2 {
compatible = "maxim,max14830";