clearfog: Enable MAX14830 quad UART
I had to be very careful when it came to clock naming; simply using
"oscillator" actually mangled the "refclk" on the SoC, which had a nice
side effect of confusing the watchdog timer. Sweet times.
Another funny point were the interrupts. The Mikrobus INT line is
actually pulled *down* by the SoC. The only accessible GPIOs with a
pull-up are J18 (unpopulated) and the UART's TX. Let's just reconfigure
MPP25 (formerly UART TX) for interrupts; this involves the pinctrl
dance, too.
Change-Id: I8a0adb3d15586797ffe6d95fda2365df87ba9e36
diff --git a/board/czechlight/clearfog/linux.fragment b/board/czechlight/clearfog/linux.fragment
index 2ccbf53..b2db091 100644
--- a/board/czechlight/clearfog/linux.fragment
+++ b/board/czechlight/clearfog/linux.fragment
@@ -11,3 +11,6 @@
# PMBus for the PSUs
CONFIG_PMBUS=y
CONFIG_SENSORS_PMBUS=y
+
+# SPI-to-Quad-UART
+CONFIG_SERIAL_MAX310X=y